Processor architecture

The arch contains processor architecture descriptions.

class ppci.arch.arch.Architecture(options=None)

Base class for all targets

between_blocks(frame)

Generate any instructions here if needed between two blocks

determine_arg_locations(arg_types)

Determine argument location for a given function

determine_rv_location(ret_type)

Determine the location of a return value of a function given the type of return value

gen_call(label, args, rv)

Generate instructions for a function call.

gen_epilogue(frame)

Generate instructions for the epilogue of a frame.

Parameters:frame – the function frame for which to create a prologue
gen_function_enter(args)

Generate code to extract arguments from the proper locations

The default implementation tries to use registers and move instructions.

Parameters:args – an iterable of virtual registers in which the arguments must be placed.
gen_prologue(frame)

Generate instructions for the epilogue of a frame.

Parameters:frame – the function frame for which to create a prologue
get_compiler_rt_lib

Gets the runtime for the compiler. Returns an object with the compiler runtime for this architecture

get_reloc(name)

Retrieve a relocation identified by a name

get_runtime()

Create an object with an optional runtime.

get_size(typ)

Get type of ir type

has_option(name)

Check for an option setting selected

make_id_str()

Return a string uniquely identifying this machine

move(dst, src)

Generate a move from src to dst

runtime

Gets the runtime for the compiler. Returns an object with the compiler runtime for this architecture

class ppci.arch.arch_info.ArchInfo(type_infos=None, endianness=<Endianness.LITTLE: 1>, register_classes=())

A collection of information for language frontends

get_alignment(typ)

Get the alignment for the given type

get_size(typ)

Get the size (in bytes) of the given type

get_type_info(typ)

Retrieve type information for the given type

class ppci.arch.arch.Frame(name, debug_db=None, fp_location=<FramePointerLocation.TOP: 1>)

Activation record abstraction. This class contains a flattened function. Instructions are selected and scheduled at this stage. Frames differ per machine. The only thing left to do for a frame is register allocation.

add_constant(value)

Add constant literal to constant pool

alloc(size: int, alignment: int)

Allocate space on the stack frame and return a stacklocation

emit(ins)

Append an abstract instruction to the end of this frame

insert_code_after(instruction, code)

Insert a code sequence after an instruction

insert_code_before(instruction, code)

Insert a code sequence before an instruction

is_used(register)

Check if a register is used by this frame

live_ranges(vreg)

Determine the live range of some register

new_label()

Generate a unique new label

new_name(salt)

Generate a new unique name

new_reg(cls, twain='')

Retrieve a new virtual register

class ppci.arch.isa.Isa

Container type for an instruction set.

Contains a list of instructions, mappings from intermediate code to instructions.

Isa’s can be merged into new isa’s which can be used to define target. For example the arm without FPU can be combined with the FPU isa to expand the supported functions.

add_instruction(instruction)

Register an instruction into this ISA

pattern(non_term, tree, condition=None, size=1, cycles=1, energy=1)

Decorator function that adds a pattern.

peephole(function)

Add a peephole optimization function

register_pattern(pattern)

Add a pattern to this isa

register_relocation(relocation)

Register a relocation into this isa

class ppci.arch.registers.Register(name, num=None, aliases=(), aka=())

Baseclass of all registers types

is_colored

Determine whether the register is colored

class ppci.arch.encoding.Instruction(*args, **kwargs)

Base instruction class.

Instructions are created in the following ways:

  • From python code, by using the instruction directly: self.stream.emit(Mov(r1, r2))
  • By the assembler. This is done via a generated parser.
  • By the instruction selector. This is done via pattern matching rules

Instructions can then be emitted to output streams.

Instruction classes are automatically added to an isa if they have an isa attribute.

classmethod decode(data)

Decode data into an instruction of this class

defined_registers

Return a set of all defined registers

encode()

Encode the instruction into binary form.

returns bytes for this instruction.

get_positions()

Calculate the positions in the byte stream of all parts

reads_register(register)

Check if this instruction reads the given register

registers

Determine all registers used by this instruction

relocations()

Determine the total set of relocations for this instruction

replace_register(old, new)

Replace a register usage with another register

set_all_patterns(tokens)

Look for all patterns and apply them to the tokens

classmethod sizes()

Get possible encoding sizes in bytes

used_registers

Return a set of all registers used by this instruction

writes_register(register)

Check if this instruction writes the given register