Microblaze

The microblaze is a softcore architecture specified by xilinx. It is a 32 bit processor with 32 registers.

See also:

https://www.xilinx.com/support/documentation/sw_manuals/mb_ref_guide.pdf

Reference

Microblaze architecture.

Low level instruction class usage:

>>> from ppci.arch.microblaze import instructions, registers
>>> i = instructions.Add(registers.R4, registers.R5, registers.R6)
>>> str(i)
'add R4, R5, R6'
class ppci.arch.microblaze.MicroBlazeArch(options=None)

Microblaze architecture

determine_arg_locations(arg_types)

Use registers R5-R10 to pass arguments

determine_rv_location(ret_type)

Return values in R3-R4

gen_call(frame, label, args, rv)

Generate proper calling sequence

gen_epilogue(frame)

Return epilogue sequence for a frame.

gen_function_enter(args)

Generate code to extract arguments from the proper locations

The default implementation tries to use registers and move instructions.

Parameters:args – an iterable of virtual registers in which the arguments must be placed.
gen_litpool(frame)

Generate instructions for literals

gen_prologue(frame)

Returns prologue instruction sequence.

get_runtime()

Compiles the runtime support for microblaze.

It takes some c3 code.

move(dst, src)

Generate a move from src to dst

class ppci.arch.microblaze.MicroBlazeRegister(name, num=None, aliases=(), aka=())

A microblaze register